About FTL Three- page-level Mapping Algorithm


There is a solid state disk flash translation layer (Flash Translation Layer: FTL), used to translate the upper file system read and write commands , the various memory management operations.

  • FTL directly affect the SSD performance, life , energy consumption is good or bad . However, existing FTL usually can not take into account these three requirements.
  • In order to achieve balance between performance, life , energy consumption goal , this paper presents two different FTL algorithms, namely three- page-level mapping algorithm , hidden translation process mapping algorithm .
  • Three page-level mapping algorithm is the use of solid state disk hardware structure, a packet into multiple parts , from the perspective of the entire allocation SSDs logically as three-tier structure : a group of one channel .
  • In this algorithm , when a group of logical pages are assigned to a block group, the logical pages can be assigned to any of the block group, a physical page .

Three page-level mapping table mapping reduced capacity , but offers similar performance pure page-level mapping is a high-performance , low-cost mapping . Hide the translation process mapping algorithm is through the introduction of the traditional structure of a solid state disk memory device ( phase change memory ) to store all the page-level mapping relational data mapping will be read and write user data path separation path , reaching the page-level mapping with the same performance , reducing the storage capacity of memory mappings , reducing memory consumption , thereby directly reducing the energy consumption of SSDs .

About FTL Types and Distribution Methods


Flash-based solid state disk (Flash-based Solid State Disk: SSD) is the recent emergence of a new type of storage device.

Traditional hard drive is mechanical components, and solid state disk flash memory chips by the composition of a certain structure. Compared with traditional hard drives, SSDs in terms of performance, power consumption, reliability, size and so has a distinct advantage.

Now, SSDs have gradually become the portable computer systems, desktop computer systems, large server systems, high-performance computing system is an important storage devices. But Flash has some unique reader features, such as: the first after wiping write endurance is limited, single-chip flash memory read and write performance is limited volume, therefore, for SSD composition, structure design software should be targeted , based on these characteristics and the characteristics of the external load for special “customization.”

  SSDs have multiple channels, each channel consists of a large number of flash memory chips, flash memory chips has a multilayer structure including chip – wafer – grouping. Thus, there are four levels of SSDs parallel structure: channels parallel – the inter-chip parallel – Parallel between wafers – grouping between parallel.

Effective use of these four levels of parallelism is to improve the overall write performance of SSDs key. In the solid-state disk, FTL flash operation types and distribution methods affect the use of four-parallelism, such as:

  • More advanced commands grouping operation is the use of packet inter-parallel;
  • Interleaving operation is the use of advanced commands between wafers parallel;
  • Allocation method is the use of inter-chip parallel and parallel channels.

NAND Flash Chips & FTL


Solid state drive (Solid State Drive, SSD) is constructed using a semiconductor memory device referred to secondary storage devices.

Because of its robustness, the failure rate and power consumption has inherent advantages; their reading and writing performance also has considerable advantages, the use of NAND Flash chips constructed solid state drive solid state drives have become the mainstream.

  • NFTL algorithm for flash memory technology with the exhibit space utilization is low, erasing efficiency is not high enough to ensure the reading speed at the expense Flash read performance advantage, but does not apply to solid-state drives. Based on this, an improved scheme, by increasing the effective memory storage, including bitmap and reverse mapping tables and other ways to improve metadata NFTL algorithm makes it suitable for solid state drives, and achieved certain performance improvements.
  • There is a solid state disk flash translation layer (Flash Translation Layer: FTL), used to translate the upper file system read and write commands, the various memory management operations.
  • FTL directly affect the SSD performance, life, energy consumption is good or bad. However, existing FTL usually can not take into account these three requirements. In order to achieve balance between performance, life, energy consumption goal, this paper presents two different FTL algorithms, namely three-page-level mapping algorithm, hidden translation process mapping algorithm.


Solid-state Drives R/W & FTL Technology


The data is the information society to the center, with the explosive growth of data, the traditional storage device in the application gradually revealed many shortcomings:

  • Peripheral storage device is not guaranteed demand for data hosts a large number of mechanical components used to enhance the storage subsystem power also led to decreased system stability and reliability.
  • Therefore, based on Flash technology, solid-state drive technology has become the focus of research peripheral storage devices, solid-state drives read and write performance relative to the disk has certain advantages; FTL Flash Translation Layer would make the application of the more obvious advantages.

And because solid-state drives without mechanical equipment, and the driving voltage is low, you can reduce power consumption and improve the earthquake resistance of solid state drives and reliability. Solid-state drives to read and write asymmetry problem exists, although the solid state drive read performance advantages, but because Flash own characteristics, its write performance does not have much advantage, and because of the Flash “block erase” feature, in when a write erase operation must be carried further led to its write performance degradation.

Another Flash memory write times increase because there will be wear and tear problems, along with the accumulation of wear and tear will cause performance degradation or even storage unit failure.


FTL Modeled as Disk Devices


Flash Memory With large storage capacity, small size, power-down data is not lost and can be used repeatedly rewritable etc., have been gradually replaced by other semiconductor memory device is widely used in MP3, memory cards, mobile phone, PDA and other mobile electronic products.

Common file system can not be directly applied to the Flash memory, flash translation layer will need Flash modeled as a disk device. Aiming at the wide application of NAND Flash memory Flash controller firmware through the design and implementation of Flash Translation Layer FTL the Flash memory is modeled as a disk device, then the NAND Flash to establish stable performance of the FAT file system.

This paper analyzes the Flash file system structure and realization form, in-depth study of NAND Flash storage management technology, including address mapping, wear leveling algorithm, garbage collection policies, bad block management, power protection and encrypted storage, and put forward the Flash storage management technology to achieve layered software architecture designed to research and develop a practical for encrypted storage of NAND Flash memory management module, and in the actual product in the applications. Papers main work includes the following aspects:

(1) studied the Flash file system structure and implementation form.

(2) is designed for large-capacity NAND Flash of NFTL block mapping mechanism.

(3) Research wear leveling algorithms and garbage collection strategy proposed threshold-based control of wear leveling algorithms designed to improve the life of NAND Flash.

(4) Design NAND Flash brownout protection and bad block management mechanism, improve storage reliability.

(5) flash memory devices studied and implemented the encrypted storage, password-based authentication gives the encrypted storage design, storage space is divided into common areas and secure area, store encrypted files using the encrypted area.

FTL Strategies such as BAST


Over the past few decades, the mechanical properties of the mechanical hard drive brought low random read and write performance and high power consumption. In recent years, flash memory, small size, low power consumption and shock resistance and other characteristics, makes flash memory technology is widely used in MP3, PDA and mobile phones.

  • With SSD prices decreased year by year, in the near future, SSDs will become the enterprise-class storage systems important part.
  • For solid-state drive (SSD) flash translation layer (FTL) strategies such as BAST, FAST increases the cost of garbage collection, brings SSD performance degradation and other shortcomings, we propose a page-based “write related” FTL strategy PWRST .
  • PWRST The basic idea is to analyze the I / O request access history and find out the “write related” page, the “write-related” pages being stored in the same data block. Thus reducing garbage collection overhead and I / O requests, the average response time.

Experimental results show that PWRST IOzone in Postmark and response time under load than BAST a 35% reduction, 26% less than the FAST. The TPC-C under load response time than BAST decreased by 12%, compared with a 10% reduction FAST.

FTL Scheme and Performance


Flash memory is a nonvolatile memory, the mainstream of today, one of which has a random access, high-throughput, anti-earthquake, small and easy to carry mobile and other advantages.

  • Although Flash memory is a nonvolatile memory area of ​​the disk file is not replaced, but because it has some advantages over the price and capacity is increasing more and more low reason, are widely used in mobile electronic devices.
  • For NAND flash memory can not update data locally, resulting in data consolidation consume large amounts of extra energy, a simple and effective page-based group address mapping Flash Translation Layer (FTL) scheme.
  • FTL the top of the file system requests logical address into a physical address and page page group within the group offset. The garbage collector when invalid data pages with the most physical block will be recycled and erased.

Using data access sequence-driven simulation methods to assess the performance of FTL, and storage areas have been widely used in research DiskSim and SSD-add-on simulator modified.

Experimental results show that, regardless of the real workload is still in the baseline survey work load, FTL compared to the other three kinds of famous flash translation layer can reduce more than 18% of the read, write and erase operations consume energy.

Conversion Layer Algorithm FTL


NAND flash-based storage devices by introducing a flash translation layer to the flash memory chip package, making flash storage device like an ordinary block devices use the same.

Flash Translation Layer algorithm performance largely determines the flash device storage performance, although the existing methods in the embedded environment to work, but when applied to the random access to frequently enterprise application environment exists when accessing low performance problem.

  • Proposed a flash for enterprise applications conversion layer algorithm FTL, the algorithm is based on page-level address mapping, according to the type of operation to organize access map entry information through the log information to map page to buffer frequently reserved to modify the mapping information to improve memory read and write performance.
  • Experimental results show that the proposed algorithm can effectively adapt FTL enterprise-class workloads, compared with existing methods, comprehensive reading and writing performance increased by 20% or more.
  • Flash memory capacity increases to make on which to build large-scale systems as possible, how to build a flash memory databases has become a hot research field of the database. Is the index structure of the database structures that are necessary, and the B + tree index is the most widely used configuration. This simulator is stored in flash memory chips and SSDs on the B + tree performance testing and analysis.

FTL Design and Implementation


With the explosive growth of the amount of information, more and more data-intensive applications, which computer systems, especially high-performance computing systems storage I / O performance in the more severe challenges. And a disk-based external storage device has been severely restricts the storage system I / O performance improvements.

  • Flash memory (flash memory) because of its small size, low power consumption, shock resistance and excellent read and write speeds and favored.

  • SSD is effectively alleviate the storage bottleneck problem for flash SSDs internal chip works and physical properties, the parallel scheduling technology into flash SSD Flash Translation Layer (FTL) design, the design and implementation of a plane level parallel scheduling algorithm.

  • Basic method is to read and write requests into a plurality of segments, the plurality of parallel execution on a plane through a more balanced allocation of I / O load, can significantly improve the overall solid state disk memory read and write performance.

By setting the parameters were different chip simulation and test results show that the use of parallel scheduling technology can effectively improve the flash solid state disk memory chip parallelism between, as well as between the various units within the chip parallelism, flash SSDs read and write latency are greatly improved.

WLFAT balance between practicality and compatibility, while fully consider NAND FLASH hardware features designed a targeted management mechanism, on the other hand is considered to NAND FLASH memory devices and embedded systems often require a desktop operating systems to exchange data, design inherited the FAT file system compatibility.


NAND Flash Memory Embedded System


As embedded systems of continuous improvement and development, application access to data terminals ability to put forward higher requirements, it is necessary to use a database management system. As the excellent characteristics of NAND flash memory, most embedded systems it as a storage medium. But unlike traditional disk, write data to the NAND flash memory can not be the basis of the data in the original cover but must erase operation has been performed for blocks, each block erase operation is performed on the number of times is limited. The database write operation to occur a lot of times, resulting in an increase in the erase operation, shorten the period of use of NAND flash memory. How to overcome this characteristic is NAND flash memory has been much concern.

B + tree database indexes and other aspects of the data read and write performance has a greater advantage, portability, better stability and maintainability.

Practical application in the database, the index number is a lot of writing, which use NAND flash duration will have an impact, so the need to design one for the physical characteristics of NAND flash memory indexing mechanism to minimize the NAND flash write and erase operation.

  • In the analysis of NAND flash and embedded database, based on the combination of the first “Additional Pages” and B + tree index, the node will be split, use the “additional page” to store the new keyword inserted, effectively easing the split operation , thus reducing the need for NAND flash write and erase, and improve data storage rate;
  • Secondly combines journaling file system, using a Log-Mode B + tree indexing mechanism, following node changes that will change the contents entered into the log. Every write operation corresponds to a Log Entry, when the data to be written to the database system records created record buffer fills, the corresponding log record is written to the NAND flash memory.
  • Create a B + tree node architecture diagram, and use the corresponding node address list logging (NLAT) the node and the node corresponding log records linked.

Log-Mode index tree merge a number of write operations, reducing the need for NAND flash flash, flash extended period of use. The chain length on NLAT through the “compression” control logging carried out to improve the performance of the system to read and write performance is analyzed against. Of the “outdated” to clean up logging, combined with the practical application of algorithm presents a balanced wear and balanced use of NAND flash memory each block, thereby extending flash lifetime. Finally build experimental platform, in the embedded Linux system, the improved indexing applied to the SQLite3 embedded database indexes each data comparison test results show that the improved scheme effectively make use of flash memory may be long, but also improve the data Storage share.