There is a solid state disk flash translation layer (Flash Translation Layer: FTL), used to translate the upper file system read and write commands , the various memory management operations.
- FTL directly affect the SSD performance, life , energy consumption is good or bad . However, existing FTL usually can not take into account these three requirements.
- In order to achieve balance between performance, life , energy consumption goal , this paper presents two different FTL algorithms, namely three- page-level mapping algorithm , hidden translation process mapping algorithm .
- Three page-level mapping algorithm is the use of solid state disk hardware structure, a packet into multiple parts , from the perspective of the entire allocation SSDs logically as three-tier structure : a group of one channel .
- In this algorithm , when a group of logical pages are assigned to a block group, the logical pages can be assigned to any of the block group, a physical page .
Three page-level mapping table mapping reduced capacity , but offers similar performance pure page-level mapping is a high-performance , low-cost mapping . Hide the translation process mapping algorithm is through the introduction of the traditional structure of a solid state disk memory device ( phase change memory ) to store all the page-level mapping relational data mapping will be read and write user data path separation path , reaching the page-level mapping with the same performance , reducing the storage capacity of memory mappings , reducing memory consumption , thereby directly reducing the energy consumption of SSDs .